This invention relates to a bipolar transistor and its manufacturing method.
The demand for enhanced bipolar transistors has increased as a result of the demand for larger-sized and higher performance integrated circuits. SiGe bipolar transistors, with SiGe epitaxial bases, are known to provide such enhancements. For a high performance bipolar transistor, it is necessary to minimize the resistance and capacitance in the connection from the device base to the metal contact. The normal process opens a hole in an oxide layer exposing the single crystal substrate where the base and eventually the emitter will be formed. Because an epitaxial intrinsic base must be used in the SiGe transistor, the common practice of forming the extrinsic base in low capacitance, oxide isolated polysilicon before doping the intrinsic base cannot be employed and other techniques have been developed. The extrinsic base has been made, for example, under the oxide through a junction isolated diffusion in the substrate (high parasitic junction capacitance) in conjunction with selective SiGe base epitaxy, although this technique has not been successfully implemented in a production process. Alternatively, an oxide isolated polysilicon layer may be deposited after the SiGe base, but additional processing is detrimental to transistor performance. Extrinsic bases have also been made by simply using the poly-SiGe layer deposited on the oxide during the growth of the epitaxial base within the window. The epitaxial layer must be thin to achieve the high performance transistor but the concurrently deposited poly-SiGe layer is even thinner due to the delay in initiating the growth of SiGe on oxide. The thinner layer over the oxide has a high resistance unsuitable for high performance devices. There is thus a need for an oxide isolated, low resistance extrinsic base to achieve the high performance SiGe bipolar transistors and a manufacturing method that is adaptable to the production environment.
A method is provided for producing high performance bipolar transistor devices. To this end, and in accordance with the principles of the present invention, a layer of highly doped polysilicon is formed on an oxide layer on a silicon substrate, and a device window is formed by removing a portion of the highly doped polysilicon layer and the oxide layer to expose an n doped region of the silicon substrate. Epitaxial deposition then occurs both within the window to form a layer of p doped epi-SiGe on the substrate within the window and outside the window to form a layer of p doped poly-SiGe over the highly doped polysilicon layer. In the process of the present invention, the p dopant is already in place in the polysilicon layer prior to epitaxial deposition. Thus, less thermal processing is required, as the dopant does not need to be implanted and activated after epitaxial deposition. Moreover, the method of the present invention provides a uniform deposition of SiGe both above the oxide layer and within the device window.
These and other objects and advantages of the present invention shall become more apparent from the accompanying drawings and description thereof